Abstract
In this post we are going to play with an FM Radio module based on TEA5767 chip (for TEA5768 the only difference is at the bus level, we will made this precise when writing the source code).The module is essentially based on the TEA5767 to which is adds a small stereo amplifier and a connector for headphones. Indeed, the output level of TEA5767 is very weak and one needs an amplifier to make a serious use out of it. As usual we will explain both hardware and software aspects. However, since the article is pretty long, we split it into two parts.
In this first part, we look more closely at the hardware aspects. The second part
will provide
some useful functions and it will be assorted of interesting application examples. In the examples, we use the usual LCD module based on the classical 1602 LCD screen which accompanies many Arduino experiments.
Table of contents (part 1)
The FM stereo module
TEA5767 vs. TEA5768
Datasheets
Module pinout
The antenna
Basic operation
Write sequence
TEA5767 vs. TEA5768
Datasheets
Module pinout
The antenna
Basic operation
Write sequence
Warning:
Click on the "more" button below to be able to fully exploit the links in the list above.
The FM stereo module
The module is represented in Figure 1. Indeed, it is essentially a "decoration" for the TEA5767 module which can be seen in the central part of the picture. Figure 2 zooms on the TEA5767 module.
Figure 1. The FM stereo module for Arduino. |
Figure 2. TEA5767 module. |
TEA5767 vs. TEA5768
Essentially TEA5767 and TEA5768 differ for the set of communication protocols that they support and/or the packaging; all other characteristics are identical. There are three
models:
- TEA5767HN: FM stereo radio, 40 leads with I2C and 3-Wire bus. Body 6*6*0.85 mm, SOT1618 package.
- TEA5767HL: FM stereo radio, 32 leads with 3-Wire bus. Body: 7*7*1.4 mm, SOT358 package.
- TEA5768HL: FM stereo radio, 32 leads with I2C bus. Body: 7*7*1.4 mm, SOT358 package.
Datasheets
TEA5767HN | Revision 2007. |
TEA5767HN | Revision 2003. |
TEA5767HL | Revision 2004. |
TEA5768HL | Revision 2008 (indeed identical to rev. 2003). |
TEA5768HL | Revision 2003. |
AN10133 | Application note for TEA5767/TEA5768. |
TEA576X | Brochure. |
The pin out
The pins are pretty well signalled on the module and should be connect to your Arduino as followsModule | Uno | Mega | Leonardo | Due |
---|---|---|---|---|
SDA | A4 | 20 | 2 | 20 or SDA1 |
SCL | A5 | 21 | 3 | 21 or SCL1 |
GND | GND | GND | GND | GND |
Vcc | +5V | +5V | +5V | +5V |
ANT | Antenna, see the dedicated section. |
The antenna
If you don't have an antenna then you can easily build one by yourself. For example, in my experiments I've just used a 30cm long cable with female Dupont endpoints. Of course, this is not very efficient. Better results can be obtained with cables of length proportional to the length of the FM wave. Usually they use 1/4 or 1/2 of the length of the 100MHz wave that is 713mm or 1416mm, respectively. For even better reception one can build a dipole antenna, many instructions for that can be found over the internet, for example here.
Basic operation
The module communicates with the Arduino via the I2C bus. Its unique address is 0x60. Commands are sent on the I2C bus and consists of a 5 bytes sequence. The sequence is different according to read or write operations. Therefore a basic command sequence is as follows.
Wire.beginTransmission(0x60); // address of TEA5767 module // on the I2C bus Wire.write( byte1 ); Wire.write( byte2 ); Wire.write( byte3 ); Wire.write( byte4 ); Wire.write( byte5 ); Wire.endTransmission();
At power on both the left and right channels are muted. Both the frequency of the receiver
and the configurations bytes must be provided. No default power-on configuration is provided.
Write sequence
It is used to configure the FM receiver and consists of 5 bytes with the following meaning.
Byte 1 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | MUTE | MUTE=1 then both L and R channels are muted. MUTE=0 then L and R channels are not muted. |
6 | SM | If SM=1 then search mode is enabled, disabled otherwise. See here for more details. |
5 | PLL13 | 14th bit of the PLL word. |
4 | PLL12 | 13th bit of the PLL word. |
3 | PLL11 | 12th bit of the PLL word. |
2 | PLL10 | 11th bit of the PLL word. |
1 | PLL09 | 10th bit of the PLL word. |
0 (LSB) | PLL08 | 9th bit of the PLL word. |
Byte 2 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | PLL07 | 8th bit of the PLL word. |
6 | PLL06 | 7th bit of the PLL word. |
5 | PLL05 | 6th bit of the PLL word. |
4 | PLL04 | 5th bit of the PLL word. |
3 | PLL03 | 4th bit of the PLL word. |
2 | PLL02 | 3rd bit of the PLL word. |
1 | PLL01 | 2nd bit of the PLL word. |
0 (LSB) | PLL00 | 1st bit of the PLL word. |
Byte 3 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | SUD | If SUD=1 then search forward mode is activated, otherwise search backward is activated. See this section for details. |
6 | SSL1 | Search stop level MSB. See this section for details. |
5 | SSL0 | Search stop level LSB. See this section for details. |
4 | HLSI | If HLSI=1, then high side injection is activated, otherwise low side injection is activated. See here for details. |
3 | MS | If MS=1, then mono is forced, stereo otherwise. |
2 | ML | If ML=1, then the left channel is muted, non-muted otherwise. |
1 | MR | If MR=1, then the right channel is muted, non-muted otherwise. |
0 (LSB) | SWP1 | If SWP1=1, then the software port 1 is HIGH, LOW otherwise. See here for details. |
Byte 4 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | SWP2 | If SWP2=1 then software port 2 is HIGH, LOW otherwise. |
6 | STBY | If STBY=1, then stand-by mode is activated, unactivated otherwise. |
5 | BL | If BL=1, then Japanese FM band is used, otherwise US/Europe FM band is used. |
4 | XTAL | Clock frequency. See here for details. |
3 | SMUTE | If SMUTE=1, then software mute is on, off otherwise. |
2 | HCC | If HCC=1, then High Control Cut is on, off otherwise. |
1 | SNC | If SNC=1, then Stereo Noise Canceling is on, off otherwise. |
0 (LSB) | SI | (Search Indicator) If SI=1, then the software port 1 is output for the ready flag, otherwise the SWP1 pin is software port 1. |
Byte 5 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | PLLREF | If PLLREF=1 then the 6.5MHz is used as reference frequency for the PLL, not used otherwise. |
6 | DTC | (De-emphasis time constant) If DTC=1, then de-emphasis time constant is 75μS; 50μS otherwise. |
5 | - | Unused. |
4 | - | Unused |
3 | - | Unused. |
2 | - | Unused. |
1 | - | Unused. |
0 (LSB) | - | Unused. |
Write sequence defaults
Being in Europe, then DTC=0 and BL=0. Moreover, as we have already seen, our module is clocked at 32768Hz and hence PLLREF=0 and XTAL=1. I would set also SWP2=0 since I've not understood what is the usage of this bit.
Read sequence
The read sequence allow to inquiry for the current FM station frequency, the Intermediate
Frequency and the level of reception of the current FM station. It consists of 5 bytes (like
the write sequence) which are detailed in the following tables.
Byte 1 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | RF | If RF=1 then a station has been found or the band limit is reached, not station otherwise. |
6 | BLF | If BLF=1, then the band limit is reached; unreached otherwise. |
5 | PLL13 | 14th bit of the PLL register. |
4 | PLL12 | 13th bit of the PLL register |
3 | PLL11 | 12th bit of the PLL register. |
2 | PLL10 | 11th bit of the PLL register. |
1 | PLL09 | 10th bit of the PLL register. |
0 (LSB) | PLL08 | 9th bit of the PLL register. |
Byte 2 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | PLL07 | 8th bit of the PLL register. |
6 | PLL06 | 7th bit of the PLL register. |
5 | PLL05 | 6th bit of the PLL register. |
4 | PLL04 | 5th bit of the PLL register. |
3 | PLL03 | 4th bit of the PLL register. |
2 | PLL02 | 3rd bit of the PLL register. |
1 | PLL01 | 2nd bit of the PLL register. |
0 (LSB) | PLL00 | 1st bit of the PLL register. |
Byte 3 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | STEREO | If STEREO=1 then stereo reception, mono otherwise. |
6 | PLL-IF6 | Bit 7 of IF counter result. |
5 | PLL-IF05 | Bit 6 of IF counter result. |
4 | PLL-IF04 | Bit 4 of IF counter result. |
3 | PLL-IF03 | Bit 3 of IF counter result. |
2 | PLL-IF02 | Bit 2 of IF counter result. |
1 | PLL-IF01 | Bit 1 of IF counter result. |
0 (LSB) | PLL-IF00 | Bit 0 ofIF counter result. |
Byte 4 | ||
---|---|---|
Bit | Name | Description |
7 (MSB) | LEV3 | Bit 3 of ADC level output. |
6 | LEV2 | Bit 2 of ADC level output. |
5 | LEV1 | Bit 1 of ADC level output. |
4 | LEV0 | Bit 0 of ADC level output. |
3 | CI3 | Bit 3 of chip identification. Set to 0. |
2 | CI2 | Bit 2 of chip identification. Set to 0. |
1 | CI1 | Bit 1 of chip identification. Set to 0. |
0 (LSB) | CI0 | Bit 0 of chip identification. Set to 0. |
Byte 5 | ||
---|---|---|
Bit | Name | Description |
[7:0] | UNUSED | Unused. Future purpose. |
Read sequence defaults
As recommended by the datasheet, first four bits of byte 4 must be set to 0. Byte 5 is set
to 0.
Search mode
TEA5767 can search span the FM band searching for the next transmitting station. Search
mode is activated setting bit 7 of byte 1. The search direction is controlled by bit 7
of byte 3 (1 for forward, 0 for backward). The search is stopped when a station having a reception level higher than a given threshold is reached. The threshold is specified by bits 6 and 5 of byte 3 as follows
Search mode stop levels | ||
---|---|---|
Bit 6 | Bit 5 | Description |
0 | 0 | Invalid. |
0 | 1 | (low) ADC output level=5. |
1 | 0 | (medium) ADC output level=7. |
1 | 1 | (high) ADC output level=10. |
The PLL register
The PLL register is a 14 bits register which is used to set the frequency of the PLL
of TEA5767. The desired frequency is expressed in MHz and it is a float number Fdes (ranging between 76.0 and 108.0). The formulas for converting this number into an integer to feed the
PLL register depends on: the clock reference frequency (FREF), the intermediate frequency (FIF) and the type of side injection (high or low, see here for more about side injection).
The formula when high side injection is chosen is as follows:
Remark that when the clock is 32.768KHz then FREF is 32.768KHz (it is 50KHz when the clock is 13MHz or 6.5MHz). Moreover FIF is fixed at 225KHz. Hence our previous formula simplifies as follows
In the case of low side injection, the previous formulas are changed as follows
The effect of setting the PLL register (and performing a write operation immediately afterwards) is to tune the FM receiver on Fdes.
The formula when high side injection is chosen is as follows:
Remark that when the clock is 32.768KHz then FREF is 32.768KHz (it is 50KHz when the clock is 13MHz or 6.5MHz). Moreover FIF is fixed at 225KHz. Hence our previous formula simplifies as follows
In the case of low side injection, the previous formulas are changed as follows
and
Warning: in the formula integer division is used! Hence, for example, 5/3=1 and 11/3=3.
The effect of setting the PLL register (and performing a write operation immediately afterwards) is to tune the FM receiver on Fdes.
Side injection
The frequency of the local oscillator fLO is set so the desired reception radio frequency fRF mixes to fIF. There are two choices for the local oscillator frequency because the dominant mixer products are at fRF ± fLO. If the local oscillator frequency is less than the desired reception frequency, it is called low-side injection (fIF = fRF - fLO); if the local oscillator is higher, then it is called high-side injection (fIF = fLO - fRF).
Software ports
The TEA5757 has two software programmable ports (with open collector). If SWP1 is set then
the soft port 1 operates as a tuning indicator output. As long as the IC has not completed a tuning action, pin SWP1 remains LOW. The pin becomes HIGH, when a preset or search tuning is completed or when a band limit is reached.
However, remark that this feature cannot be exploited by our module. So the information for the tuning action complete has to be extracted using the corresponding RF flag in byte 1 of the reading sequence.
I've not understood what is the purpose of software port 2. Sorry!
However, remark that this feature cannot be exploited by our module. So the information for the tuning action complete has to be extracted using the corresponding RF flag in byte 1 of the reading sequence.
I've not understood what is the purpose of software port 2. Sorry!
Band limits
The module supports two bands:
- Japanese (76MHz - 91MHz)
- European/American (87.5MHz - 108MHz)
Clock frequency
The FM receiver can work at three different clock speeds. These can be specified using Bit PLLREF of Byte 5 and Bit XTAL of Byte 4. Remark that our module has an external crystal clocked at 32.768 KHz.Clock frequency setting | ||
---|---|---|
PLLREF | XTAL | Description |
0 | 0 | 13 MHz |
0 | 1 | 32.768 kHz |
1 | 0 | 6.5 MHz |
1 | 1 | Not allowed. |
Soft Mute
The “soft-mute” function suppresses the inter-station noise and prevents excessive noise from being heard when the signal level drops to a low level.
High control cut
HCC is a reduction of higher audio frequencies.
The most annoying audio distortions are in the higher
frequency band, so a low pass filter is activated which
reduces the higher frequencies.
Stereo noise cancelling
Stereo Noise Cancelling -also named SDS (Signal dependant stereo)- consists in switching
the stereo decoder from stereo to mono in case a weak signal is received. This will limit
the output noise of the decoder. Also by the absence of the pilot or when the stereo control is switched to “force mono”, switching SNC on or off will not affect the audio reception so that only mono information will be passed to the audio output.
De-emphasis Time Constant
(This section is taken from Wikipedia)
Random noise has a triangular spectral distribution in an FM system, with the effect that noise occurs predominantly at the highest frequencies within the baseband. This can be offset, to a limited extent, by boosting the high frequencies before transmission and reducing them by a corresponding amount in the receiver. Reducing the high frequencies in the receiver also reduces the high-frequency noise. These processes of boosting and then reducing certain frequencies are known as pre-emphasis and de-emphasis, respectively.
The amount of pre-emphasis and de-emphasis used is defined by the time constant of a simple RC filter circuit. In most of the world a 50 µs time constant is used. In the Americas and South Korea, 75 µs is used. This applies to both mono and stereo transmissions. For stereo, pre-emphasis is applied to the left and right channels before multiplexing.
The amount of pre-emphasis that can be applied is limited by the fact that many forms of contemporary music contain more high-frequency energy than the musical styles which prevailed at the birth of FM broadcasting. They cannot be pre-emphasized as much because it would cause excessive deviation of the FM carrier.
Alternate modules
Many similar modules can be found on the market. You can find below the photos of some which work similarly to the one used for our experiments.Figure 3. An example of alternate FM Stereo modules. |
What's next
As promised at the very beginning, we are going to provide a complete library for programming
the TEA5767/TEA5768 assorted with an application example. So stay tuned!
See also
FM radio receiver for your Arduino (TEA5767/TEA5768/TEA5757) (Part 2/4)
FM Radio receiver (TEA5767HL-TEA5767HN-TEA5768HL) (Part 3/4)
FM Radio receiver (TEA5767HL-TEA5767HN-TEA5768HL) (Part 4/4)
FM Radio receiver (TEA5767HL-TEA5767HN-TEA5768HL) (Part 3/4)
FM Radio receiver (TEA5767HL-TEA5767HN-TEA5768HL) (Part 4/4)
Enjoy!
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